6.9 Saving/restore general purpose registers ........................................................................... 61
6.10 Interrupt timing .................................................................................................................... 62
6.11 Interrupt register overview .................................................................................................. 63
6.11.1 Interrupt Enable Register (IE, IE1, IE2, and IE3) ................................................... 63
6.11.2 Interrupt Priority Register (IP and IP1) ................................................................... 63
6.11.3 External Interrupt Flag Register (EIFLAG0 and EIFLAG1) .................................... 63
6.11.4 External Interrupt Polarity Register (EIPOL0L, EIPOL0H, EIPOL1 and EIPOL2) . 63
6.11.5 Register map .......................................................................................................... 64
6.11.6 Interrupt register description ................................................................................... 65
7 Clock generator ............................................................................................................................ 70
7.1 Clock generator block diagram ........................................................................................... 71
7.2 Register map ....................................................................................................................... 71
7.3 Register description ............................................................................................................ 72
8 Basic Interval Timer ..................................................................................................................... 74
8.1 BIT block diagram ............................................................................................................... 74
8.2 BIT register map.................................................................................................................. 74
8.3 BIT register description ....................................................................................................... 75
9 Watchdog timer ............................................................................................................................ 76
9.1 Setting window open period of watchdog timer .................................................................. 77
9.2 WDT block diagram ............................................................................................................ 78
9.3 Register map ....................................................................................................................... 78
9.4 Register description ............................................................................................................ 79
10 Watch timer .................................................................................................................................. 81
10.1 WT block diagram ............................................................................................................... 81
10.2 Register map ....................................................................................................................... 82
10.3 Watch timer register description ......................................................................................... 82
11 Timer 0/1/2 ................................................................................................................................... 84
11.1 Timer 0 ................................................................................................................................ 84
11.1.1 8-bit timer/counter mode ........................................................................................ 84
11.1.2 8-bit PWM mode ..................................................................................................... 86
11.1.3 8-bit capture mode ................................................................................................. 88
11.1.4 Timer 0 block diagram ............................................................................................ 90
11.1.5 Register map .......................................................................................................... 90
11.1.6 Register description ................................................................................................ 91
11.2 Timer 1 ................................................................................................................................ 92
11.2.1 16-bit timer/counter mode ...................................................................................... 93
11.2.2 16-bit capture mode ............................................................................................... 95
11.2.3 16-bit PPG mode .................................................................................................... 97
11.2.4 16-bit complementary PWM mode (dead time)...................................................... 99
11.2.5 16-bit timer 1 block diagram ................................................................................. 101
11.2.6 Register map ........................................................................................................ 102
11.2.7 Register description .............................................................................................. 102
11.3 Timer 2 .............................................................................................................................. 105
11.3.1 16-bit timer/counter mode .................................................................................... 106
11.3.2 16-bit capture mode ............................................................................................. 108
11.3.3 16-bit PPG mode .................................................................................................. 110
11.3.4 16-bit timer 2 block diagram ................................................................................. 112
11.3.5 Register map ........................................................................................................ 112
11.3.6 Register description .............................................................................................. 113
12 Buzzer driver .............................................................................................................................. 115
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