Fujitsu 8FX User Manual

MB95630H Series
464 FUJITSU SEMICONDUCTOR LIMITED MN702-00009-2v0-E
CHAPTER 22 UART/SIO
22.6 Operations and Setting Procedure Example
The baud rate in clock asynchronous mode (UART) can be set in the following range.
● Transfer data format
UART can treat data only in NRZ (Non-Return-to-Zero) format. Figure 22.6-2 shows the data
format.
The character bit length can be selected from among 5 to 8 bits depending on the settings of
SMC1n:CBL[1:0].
The stop bit length can be set to 1 or 2 bits depending on the setting of SMC1n:SBL.
The PEN bit and TDP bit in the SMC1n register can be used to enable/disable parity and to
select parity polarity.
As shown in Figure 22.6-2, the transfer data always starts from the start bit ("L" level) and ends
with the stop bit ("H" level) by performing the specified data bit length transfer with MSB first
or LSB first ("LSB first" or "MSB first" can be selected by the BDS bit in the SMC1n register).
It becomes "H" level at the idle state.
Figure 22.6-2 Transfer Data Format
Table 22.6-3 Baud Rate Setting Range in Clock Asynchronous Mode (UART)
PSS[1:0] BRS[7:0]
0b00 to 0b11 0x02 (2) to 0xFF (255)
ST D0
D1
D2
D3
D4
SP
ST D0
D1
D2
D3
D4
P SP
ST D0
D1
D2
D3
D4
SP
SP
ST D0
D1
D2
D3
D4
P SP
SP
ST D0
D1
D2
D3
D4 D5 D6
D7
SP
ST D0
D1
D2
D3
D4 D5 D6
P
SP
D7
ST D0
D1
D2
D3
D4 D5 D6
D7
SP
SP
ST D0
D1
D2
D3
D4 D5 D6
P
SP
D7
SP
Without P
With P
Without P
With P
5-bit data
8-bit data
ST
SP
P
: Start bit
: Stop bit
: Parity bit
D0 to D7: Data. The sequence can be selected from "LSB first" or "MSB first" by the
direction control register (BDS bit)
Note: 6-bit data and 7-bit data have the same data format as 5-bit data.

Fujitsu 8FX Specifications

General

Brand	Fujitsu
Model	8FX
Category	Computer Hardware
Language	English