Renesas H8 Series

Section 2 CPU
Rev. 7.00 Mar 10, 2005 page 61 of 652
REJ09B0042-0700
H'0000
H'0029
H'002A
H'7FFF
H'7000
H'F020
H'F02B
H'F740
H'F74F
H'FB80
H'FB7F
H'FF7F
H'FF80
H'FFFF
Interrupt vector area
User area
(1 Kbyte)
On-chip ROM
32 Kbytes
(32768 bytes)
1024 bytes
Internal I/O register
(128 bytes)
(Workarea for reprogramming
flash memory: 1 Kbyte)
*
2
Internal I/O register
Not used
Firmware
for on-chip emulator
*
1
H'F780
Not used
Not used
LCD RAM (16 bytes)
H'0000
H'0029
H'002A
H'7FFF
H'F740
H'F74F
H'FB80
H'FF7F
H'FF80
H'FFFF
Interrupt vector area
HD64F38024, HD64F38024R, HD64F38124
(flash memory version)
HD64338024 (mask ROM version)
HD64338024S (mask ROM version)
HD64338124 (mask ROM version)
HD64738024 (PROM version)
On-chip ROM
32 Kbytes
(32768 bytes)
1024 bytesOn-chip RAM
Internal I/O register
(128 bytes)
Not used
Not used
LCD RAM (16 bytes)
On-chip RAM
(2 Kbytes)
Notes: 1. Not available to the user if the on-chip emulator is used.
2. Used by the programming control program when programming flash memory. Also, not available to the user
if the on-chip emulator is used.
Figure 2.16(1) H8/38024, H8/38024S, and H8/38124 Memory Map