Section 10 Serial Communication Interface
Rev. 7.00 Mar 10, 2005 page 354 of 652
REJ09B0042-0700
10.2.9 Clock stop register 1 (CKSTPR1)
 TFCKSTP TCCKSTP TACKSTP S32CKSTP ADCKSTP TGCKSTP
76543210
1
1111111

R/W R/W R/W
 R/W R/W
R/W
Bit
Initial value
Read/Write
CKSTPR1 is an 8-bit read/write register that performs module standby mode control for peripheral
modules. Only the bits relating to SCI3 are described here. For details of the other bits, see the
sections on the relevant modules.
Bit 5—SCI3 Module Standby Mode Control (S32CKSTP)
Bit 5 controls setting and clearing of module standby mode for SCI3.
S32CKSTP Description
0 SCI3 is set to module standby mode
*
1 SCI3 module standby mode is cleared (initial value)
Note: * All SCI3 register is initialized in module standby mode.
10.2.10 Serial Port Control Register (SPCR)
Bit
Initial value
Read/Write
7

1

6

1

5
SPC32
0
R/W
4


W
3
SCINV3
0
R/W
0


W
2
SCINV2
0
R/W
1


W
SPCR is an 8-bit readable/writable register that performs RXD
32
and TXD
32
pin input/output data
inversion switching.
Bits 7 and 6—Reserved
Bits 7 and 6 are reserved; they are always read as 1 and cannot be modified.