Renesas H8 Series

Section 13 LCD Controller/Driver
Rev. 7.00 Mar 10, 2005 page 425 of 652
REJ09B0042-0700
13.2.4 Clock Stop Register 2 (CKSTPR2)
Bit
Initial value
Read/Write
Note: * Bits 6 and 5 are also reserved on products other than the H8/38124 Group.
7
LVDCKSTP
*
1
R/W
6

1

5

1

4
PW2CKSTP
1
R/W
3
AECKSTP
1
R/W
0
LDCKSTP
1
R/W
2
WDCKSTP
1
R/W
1
PW1CKSTP
1
R/W
CKSTPR2 is an 8-bit read/write register that performs module standby mode control for peripheral
modules. Only the bit relating to the LCD controller/driver is described here. For details of the
other bits, see the sections on the relevant modules.
Bit 0—LCD Controller/Driver Module Standby Mode Control (LDCKSTP)
Bit 0 controls setting and clearing of module standby mode for the LCD controller/driver.
Bit 0
LDCKSTP Description
0 LCD controller/driver is set to module standby mode
1 LCD controller/driver module standby mode is cleared (initial value)