Section 5 Power-Down Modes
Rev. 7.00 Mar 10, 2005 page 130 of 652
REJ09B0042-0700
• When the on-chip oscillator is used
8,192 states (STS2 = STS1 = STS0 = 0) is recommended if the on-chip oscillator is used on
the H8/38124 Group.
5.3.4 Standby Mode Transition and Pin States
When a SLEEP instruction is executed in active (high-speed) mode or active (medium-speed)
mode while bit SSBY is set to 1 and bit LSON is cleared to 0 in SYSCR1, and bit TMA3 is
cleared to 0 in TMA, a transition is made to standby mode. At the same time, pins go to the high-
impedance state (except pins for which the pull-up MOS is designated as on). Port 5 of the
HD64F38024 retains the previous pin state. Figure 5.2 shows the timing in this case.
SLEEP instruction fetch Internal data bus Fetch of next instruction
Port outputPins High-impedance
Active (high-speed) mode or active (medium-speed) mode Standby mode
SLEEP instruction execution Internal processing
φ
Figure 5.2 Standby Mode Transition and Pin States
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