Section 11 10-Bit PWM
Rev. 7.00 Mar 10, 2005 page 394 of 652
REJ09B0042-0700
11.2.2 PWM Data Registers U and L (PWDRUm, PWDRLm)
Bit
Initial value
Read/Write
7

1

6

1

5

1

4

1

3

1

0
PWDRUm0
0
W
2

1

1
PWDRUm
1
0
W
PWDRUm
Bit
Initial value
Read/Write
7
PWDRLm7
0
W
6
PWDRLm6
0
W
5
PWDRLm5
0
W
4
PWDRLm4
0
W
3
PWDRLm3
0
W
0
PWDRLm0
0
W
2
PWDRLm2
0
W
1
PWDRLm1
0
W
PWDRLm
PWDRUm and PWDRLm form a 10-bit write-only register, with the upper 2 bits assigned to
PWDRUm and the lower 8 bits to PWDRLm. The value written to PWDRUm and PWDRLm
gives the total high-level width of one PWM waveform cycle.
When 10-bit data is written to PWDRUm and PWDRLm, the register contents are latched in the
PWM waveform generator, updating the PWM waveform generation data. The 10-bit data should
always be written in the following sequence:
1. Write the lower 8 bits to PWDRLm.
2. Write the upper 2 bits to PWDRUm for the same channel.
PWDRUm and PWDRLm are write-only registers. If they are read, all bits are read as 1.
Upon reset, PWDRUm is initialized to H'FC, and PWDRLm to H'00.
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