Renesas H8 Series

Section 12 A/D Converter
Rev. 7.00 Mar 10, 2005 page 400 of 652
REJ09B0042-0700
12.1.2 Block Diagram
Figure 12.1 shows a block diagram of the A/D converter.
Internal data bus
AMR
ADSR
ADRRH
ADRRL
Control logic
+
Com-
parator
AN
0
AN
1
AN
2
AN
3
AN
4
AN
5
AN
6
AN
7
ADTRG
AV
AV
CC
SS
Multiplexer
Reference
voltage
IRRAD
AV
CC
AV
SS
[Legend]
AMR:
ADSR:
ADRR:
IRRAD:
A/D mode register
A/D start register
A/D result register
A/D conversion end interrupt request flag
−
Figure 12.1 Block Diagram of the A/D Converter