Renesas H8 Series Hardware Manual

Section 3 Exception Handling
Rev. 7.00 Mar 10, 2005 page 78 of 652
REJ09B0042-0700
Table 3.2 Interrupt Sources and Their Priorities
Interrupt Source Interrupt Vector Number Vector Address Priority
RES
Watchdog timer
Reset 0 H'0000 to H'0001 High
IRQ
0
LVDI
*
IRQ
0
Low-voltage detect interrupt
*
4 H'0008 to H'0009
IRQ
1
IRQ
1
5 H'000A to H'000B
IRQAEC IRQAEC 6 H'000C to H'000D
IRQ
3
IRQ
3
7 H'000E to H'000F
IRQ
4
IRQ
4
8 H'0010 to H'0011
WKP
0
WKP
1
WKP
2
WKP
3
WKP
4
WKP
5
WKP
6
WKP
7
WKP
0
WKP
1
WKP
2
WKP
3
WKP
4
WKP
5
WKP
6
WKP
7
9 H'0012 to H'0013
Timer A Timer A overflow 11 H'0016 to H'0017
Asynchronous
event counter
Asynchronous event
counter overflow
12 H'0018 to H'0019
Timer C Timer C overflow or underflow 13 H'001A to H'001B
Timer FL Timer FL compare match
Timer FL overflow
14 H'001C to H'001D
Timer FH
Timer FH compare match
Timer FH overflow
15 H'001E to H'001F
Timer G Timer G input capture
Timer G overflow
16 H'0020 to H'0021
SCI3 SCI3 transmit end
SCI3 transmit data empty
SCI3 receive data full
SCI3 overrun error
SCI3 framing error
SCI3 parity error
18 H'0024 to H'0025
A/D A/D conversion end 19 H'0026 to H'0027
(SLEEP instruction
executed)
Direct transfer 20 H'0028 to H'0029 Low
Notes: Vector addresses H'0002 to H'0007, H'0014 to H'0015, and H'0022 to H'0023 are reserved
and cannot be used.
* The low-voltage detect interrupt triggered by the LVDI is only implemented on the
H8/38124 Group.

Renesas H8 Series Specifications

General

Brand	Renesas
Model	H8 Series
Category	Computer Hardware
Language	English