Section 4 Clock Pulse Generators
Rev. 7.00 Mar 10, 2005 page 112 of 652
REJ09B0042-0700
X
X
1
2
GND
Open
Figure 4.10 Pin Connection when not Using Subclock
External Clock Input
Connect the external clock to the X1 pin and leave the X2 pin open, as shown in figure 4.11.
Note that no external clock should be input to the H8/38124 Group.
X
1
External clock input
X
2
Open
Figure 4.11 Pin Connection when Inputting External Clock
Frequency Subclock (φ
φφ
φw)
Duty 45% to 55%
Method for Disabling Subclock Oscillator (H8/38124 Group Only)
The subclock oscillator can be disabled by programs by setting the SUBSTP bit in the OSCCR
register to 1. The register setting to disable the subclock oscillator should be made in the active
mode. When restoring operation of the subclock oscillator after it has been disabled using the
OSCCR register, it is necessary to wait for the oscillation stabilization time (typ: 8s) to elapse
before using the subclock.
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