Section 9 Timers
Rev. 7.00 Mar 10, 2005 page 254 of 652
REJ09B0042-0700
Block Diagram
Figure 9.2 shows a block diagram of timer C.
UD
φ
TMIC
φ
W
/4
PSS
TMC
Internal data bus
TCC
TLC
IRRTC
[Legend]
TMC:
TCC:
TLC:
IRRTC:
PSS:
Timer mode register C
Timer counter C
Timer load register C
Timer C overflow interrupt request flag
Prescaler S
Figure 9.2 Block Diagram of Timer C
Pin Configuration
Table 9.4 shows the timer C pin configuration.
Table 9.4 Pin Configuration
Name Abbr. I/O Function
Timer C event input TMIC Input Input pin for event input to TCC
Timer C up/down select UD Input Timer C up/down-count selection