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Renesas H8 Series Hardware Manual

Renesas H8 Series
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Section 9 Timers
Rev. 7.00 Mar 10, 2005 page 270 of 652
REJ09B0042-0700
Bit 2—Compare Match Flag L (CMFL)
Bit 2 is a status flag indicating that TCFL has matched OCRFL. This flag is set by hardware and
cleared by software. It cannot be set by software.
Bit 2
CMFL Description
0
Clearing condition: (initial value)
After reading CMFL = 1, cleared by writing 0 to CMFL
1
Setting condition:
Set when the TCFL value matches the OCRFL value
Bit 1—Timer Overflow Interrupt Enable L (OVIEL)
Bit 1 selects enabling or disabling of interrupt generation when TCFL overflows.
Bit 1
OVIEL Description
0 TCFL overflow interrupt request is disabled (initial value)
1 TCFL overflow interrupt request is enabled
Bit 0—Counter Clear L (CCLRL)
Bit 0 selects whether TCFL is cleared when TCFL and OCRFL match.
Bit 0
CCLRL Description
0 TCFL clearing by compare match is disabled (initial value)
1 TCFL clearing by compare match is enabled

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Renesas H8 Series Specifications

General IconGeneral
BrandRenesas
ModelH8 Series
CategoryComputer Hardware
LanguageEnglish

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