Renesas H8 Series - Section 5 Debugging

Rev. 7.00 Mar 10, 2005 page xxxvii of xlii
9.3.1 Overview.............................................................................................................. 253
9.3.2 Register Descriptions........................................................................................... 255
9.3.3 Timer Operation .................................................................................................. 258
9.3.4 Timer C Operation States .................................................................................... 260
9.4 Timer F............................................................................................................................. 261
9.4.1 Overview.............................................................................................................. 261
9.4.2 Register Descriptions........................................................................................... 264
9.4.3 CPU Interface...................................................................................................... 271
9.4.4 Operation............................................................................................................. 274
9.4.5 Application Notes................................................................................................ 277
9.5 Timer G............................................................................................................................. 281
9.5.1 Overview.............................................................................................................. 281
9.5.2 Register Descriptions........................................................................................... 283
9.5.3 Noise Canceler..................................................................................................... 288
9.5.4 Operation............................................................................................................. 290
9.5.5 Application Notes................................................................................................ 295
9.5.6 Timer G Application Example............................................................................. 299
9.6 Watchdog Timer............................................................................................................... 300
9.6.1 Overview.............................................................................................................. 300
9.6.2 Register Descriptions........................................................................................... 303
9.6.3 Timer Operation .................................................................................................. 309
9.6.4 Watchdog Timer Operation States....................................................................... 310
9.7 Asynchronous Event Counter (AEC)................................................................................ 311
9.7.1 Overview.............................................................................................................. 311
9.7.2 Register Configurations....................................................................................... 314
9.7.3 Operation............................................................................................................. 323
9.7.4 Asynchronous Event Counter Operation Modes ................................................. 328
9.7.5 Application Notes................................................................................................ 328
Section 10 Serial Communication Interface................................................................ 331
10.1 Overview........................................................................................................................... 331
10.1.1 Features................................................................................................................ 331
10.1.2 Block Diagram..................................................................................................... 333
10.1.3 Pin Configuration ................................................................................................ 334
10.1.4 Register Configuration......................................................................................... 334
10.2 Register Descriptions........................................................................................................ 335
10.2.1 Receive Shift Register (RSR).............................................................................. 335
10.2.2 Receive Data Register (RDR).............................................................................. 335
10.2.3 Transmit Shift Register (TSR)............................................................................. 336
10.2.4 Transmit Data Register (TDR) ............................................................................ 336