Renesas H8 Series Hardware Manual

Section 10 Serial Communication Interface
Rev. 7.00 Mar 10, 2005 page 343 of 652
REJ09B0042-0700
Bit 2—Transmit End Interrupt Enable (TEIE)
Bit 2 selects enabling or disabling of the transmit end interrupt request (TEI) if there is no valid
transmit data in TDR when MSB data is to be sent.
Bit 2
TEIE Description
0 Transmit end interrupt request (TEI) disabled (initial value)
1 Transmit end interrupt request (TEI) enabled
*
Note: * TEI can be released by clearing bit TDRE to 0 and clearing bit TEND to 0 in SSR, or by
clearing bit TEIE to 0.
Bits 1 and 0—Clock Enable 1 and 0 (CKE1, CKE0)
Bits 1 and 0 select the clock source and enabling or disabling of clock output from the SCK
32
pin.
The combination of CKE1 and CKE0 determines whether the SCK
32
pin functions as an I/O port,
a clock output pin, or a clock input pin.
The CKE0 bit setting is only valid in case of internal clock operation (CKE1 = 0) in asynchronous
mode. In synchronous mode, or when external clock operation is used (CKE1 = 1), bit CKE0
should be cleared to 0.
After setting bits CKE1 and CKE0, set the operating mode in the serial mode register (SMR).
For details on clock source selection, see table 10.9 in section 10.3.1, Overview.
Description
Bit 1
CKE1
Bit 0
CKE0 Communication Mode Clock Source SCK
32
Pin Function
0 0 Asynchronous Internal clock I/O port
*
1
Synchronous Internal clock Serial clock output
*
1
0 1 Asynchronous Internal clock Clock output
*
2
Synchronous Reserved
1 0 Asynchronous External clock Clock input
*
3
Synchronous External clock Serial clock input
1 1 Asynchronous Reserved
Synchronous Reserved
Notes: 1. Initial value
2. A clock with the same frequency as the bit rate is output.
3. Input a clock with a frequency 16 times the bit rate.

Renesas H8 Series Specifications

General

Brand	Renesas
Model	H8 Series
Category	Computer Hardware
Language	English