Sonifex S2 - System Block Diagrams

S2 User Handbook
9
System Block Diagrams
Fig 2-10 : System Block Diagram (Sheet 1).
INSTALLATION NOTES
INSTALLATION NOTES
2
ON
PGM
EQ
MIC
LINE
CUE
PFL
AUD
AUD PFL T/B
MIC
GAIN
48V
TRIM
LINE
TRIM
PA N
48V
MIC
LINE
MIC
2
INSERT
SEND
INSE
RT
RETURN
MIC CUE LIGHT
LINE REMOTES
COUGH/REV T/B
T/B ENABLE
LINE
INSERT
HF/LF
EQ
EQ
CPU
VCA
VCA
FADER
ROUTING
PFL
TO LEFT
PGM OUTPUT
TO RIGHT
PGM OUTPUT
BUS
TO TIMER
TO METER
SELECT
PGM
LRLR LR1 212
MUTES
C/FEED
ON
INPUT
TRIM
TRIM
PAN
CLEANFEED
SELECTION
AND ROUTING
INPUT
C/FEED
OUTPUT
HYBRID
LATCH
HF/LF
EQ
EQ
CPU
PGM
EQ
CUE
T/B
AUD
VCA
VCA
FADER
NULL
ROUTING
PFL
PFL TO
METER SELECT
TO TALKBACK
OUTPUT
L
FROM AUD
OUTPUT
MIX BUS
R
LRLRLR1212
MUTES
PGM AUD PFL T/BC/FEED
1
A
B
A
B
3
2
1
1
23
1
23
3
2
NULL
INPUT
SELECT
INPUT 1
LINE LEFT
INPUT
1 REMOTES
INPUT 2 REMOTES
INPUT 1
A
ES/EBU
INPUT 2
A
ES/EBU
INPUT 1
LINE RIGHT
INPUT
2
LINE LEFT
INPUT
2
LINE RIGHT
INPUT 1
INPUT 2
SPDIF
INPUT 2
RIAA
OPTION
LEFT
TRIM
LEFT
TRIM
RIGHT
TRIM
RIGHT
TRIM
D/A
AES/SPDIF
AES/SPDIF
DIGITAL INPUT VERSION
LINE 1/2
ON
NULL
6 x STEREO
BAL INPUTS
LEFT INPUT AMP
RIGHT INPUT AMP
6 WAY INPUT
AND REMOTE
OUTPUT SELECTOR
6 x REMOTE
START/STOP
C / FEED
LEFT
C / FEED
RIGHT
STEREO MIX-MINUS VERSION
STEREO SELECTOR VERSION
TRIM
BAL
HF/LF
EQ
EQ
CPU
PGM EQ
CUE
PFL
AUD
INP 1
INP 2
VCA
VCA
FADER
ROUTING
PFL
PGM
TO S2-OMC &
S2-OMS CPU
FROM PGM
OUTPUT L
FROM PGM
OUTPUT R
LRLRLR1212
AUD PFL T/B
MUTES
C/FEED
Input Channels Diagram - CMM & CML
Input Channel Diagram - CT Telco
Input Channels Diagram - CSG,CSGE,CS,CSE,CDS,CDSE, and CSMM C6SS