Abov A96G166 User Manual

A96G166/A96A166/A96S166 User’s manual 6. Interrupt controller
67
IP1 (Interrupt Priority Register 1): F8H
7
6
5
4
3
2
1
0
–
–
IP15
IP14
IP13
IP12
IP11
IP10
–
–
R/W
R/W
R/W
R/W
R/W
R/W
Initial value: 00H
IP[5:0], IP1[5:0]
Select Interrupt Group Priority
IP1x
IPx
Description
0
0
level 0 (lowest)
0
1
level 1
1
0
level 2
1
1
level 3 (highest)
EIFLAG0 (External Interrupt Flag0 Register): C0H
7
6
5
4
3
2
1
0
–
FLAG6
FLAG5
FLAG4
FLAG3
FLAG2
FLAG1
FLAG0
–
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value: 00H
EIFLAG0[6:5]
When an External Interrupt 5 ~ 6 is occurred, the flag becomes
‘1’.The flag is cleared only by writing ‘0’ to the bit or automatically
cleared by INT_ACK signal. Writing “1” has no effect.
0
External interrupt 5 ~ 6 not occurred
1
External interrupt 5 ~ 6 occurred
EIFLAG0[4:0]
When an External Interrupt 0 ~ 4 is occurred, the flag becomes
‘1’.The flag is cleared only by writing ‘0’ to the bit. So, the flag
should be cleared by software. Writing “1” has no effect.
0
External interrupt 0 ~ 4 not occurred
1
External interrupt 0 ~ 4 occurred
EIPOL0L (External Interrupt Polarity 0Low Register): A4H
7
6
5
4
3
2
1
0
POL3
POL2
POL1
POL0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value: 00H
EIPOL0L[7:0]
External interrupt (EINT3, EINT2, EINT1, EINT0) polarity selection
POLn[1:0]
Description
0
0
No interrupt at any edge
0
1
Interrupt on rising edge
1
0
Interrupt on falling edge
1
1
Interrupt on both of rising and falling edge
Where n =0, 1, 2 and 3

Abov A96G166 Specifications

General

Brand	Abov
Model	A96G166
Category	Computer Hardware
Language	English