Memory Management Unit
3-10 Copyright © 2001-2003 ARM Limited. All rights reserved. ARM DDI0198D
The two least significant bits of the first-level descriptor indicate the descriptor type as
shown in Table 3-3.
3.2.4 Section descriptor
A section descriptor provides the base address of a 1MB block of memory. Figure 3-5
shows the format of a section descriptor.
Figure 3-5 Section descriptor
[3:2] - - Bits C and B indicate whether the area of memory mapped
by this page is treated as write-back cachable, write-through
cachable, noncached buffered, or noncached nonbuffered.
- [3:2] [3:2] Should Be Zero.
[1:0] [1:0] [1:0] These bits indicate the page size and validity and are
interpreted as shown in Table 3-3.
Table 3-3 Interpreting first-level descriptor bits [1:0]
Value Meaning Description
0 0 Invalid Generates a section translation fault
0 1 Coarse page table Indicates that this is a coarse page table descriptor
1 0 Section Indicates that this is a section descriptor
1 1 Fine page table Indicates that this is a fine page table descriptor
Table 3-2 First-level descriptor bits (continued)
Bits
Description
Section Coarse Fine
0Section base address
31 20 19 12 11 10 9 8 5 4 3 2 1 0
SBZ AP
S
B
Z
Domain 1 C B 1
To Next Page
Loading...
Need help?
General
