Programmer’s Model
2-20 Copyright © 2001-2003 ARM Limited. All rights reserved. ARM DDI0198D
Table 2-16 shows the encodings used for the status field in the FSR, and if the Domain
field contains valid information. See Fault address and fault status registers on
page 3-21 for details of MMU aborts.
2.3.7 Fault Address Register c6
Register c6 accesses the Fault Address Register (FAR). The FAR contains the Modified
Virtual Address of the access being attempted when a Data Abort occurred. The FAR is
only updated for Data Aborts, not for Prefetch Aborts. The FAR is updated for
alignment faults, and external aborts that occur while the MMU is disabled.
You can use the following instructions to access the FAR:
MRC p15, 0, <Rd>, c6, c0, 0 ; read FAR
MCR p15, 0, <Rd>, c6, c0, 0 ; write FAR
Writing c6 sets the FAR to the value of the data written. This is useful for a debugger to
restore the value of the FAR to a previous state.
The CRm and Opcode_2 fields Should Be Zero when reading or writing CP15 c6.
2.3.8 Cache Operations Register c7
Register c7 controls the caches and the write buffer. The function of each cache
operation is selected by the Opcode_2 and CRm fields in the MCR instruction used to
write to CP15 c7. Writing other Opcode_2 or CRm values is Unpredictable.
Table 2-16 FSR status field encoding
Priority Source Size Status Domain
Highest Alignment - b00x1 Invalid
External abort on translation First level
Second level
b1100
b1110
Invalid
Valid
Translation Section
Page
b0101
b0111
Invalid
Valid
Domain Section
Page
b1001
b1011
Valid
Valid
Permission Section
Page
b1101
b1111
Valid
Valid
Lowest External abort Section or page b10x0 Invalid
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