ARM ARM926EJ-S User Manual

Memory Management Unit
3-26 Copyright © 2001-2003 ARM Limited. All rights reserved. ARM DDI0198D
3.5 Fault checking sequence
The sequence the MMU uses to check for access faults is different for sections and
pages. The sequence for both types of access is shown in Figure 3-13.
Figure 3-13 Sequence for checking faults
The conditions that generate each of the faults are described in:
• Alignment faults on page 3-27
Modified virtual address
Check address alignment
Alignment
fault
Misaligned
Get first-level descriptorInvalid
Section
translation
fault
Section Page
Get page
table entry
Invalid
Page
translation
fault
Check domain status
Section Page
No access (00)
Reserved (10)
Section
domain
fault
No access (00)
Reserved (10)
Page
domain
fault
Client (01) Client (01)
Manager
(11)
Check
access
permissions
Check
access
permissions
Violation
Section
permission
fault
Physical address
Violation
Page
permission
fault

ARM ARM926EJ-S Specifications

General

Brand	ARM
Model	ARM926EJ-S
Category	Computer Hardware
Language	English