ARM ARM926EJ-S - Table 2-27 Context ID Register Operations; Figure 2-16 Context ID Register Format

Programmer’s Model
ARM DDI0198D Copyright © 2001-2003 ARM Limited. All rights reserved. 2-35
{FCSE PID = 0}
MOV r0, #1:SHL:25 ;Fetched with FCSE PID = 0
MCR p15,0,r0,c13,c0,0 ;Fetched with FCSE PID = 0
A1 ;Fetched with FCSE PID = 0
A2 ;Fetched with FCSE PID = 0
A3 ;Fetched with FCSE PID = 1
Where A1, A2, and A3 are the three instructions following the fast context switch.
Context ID Register
The Context ID Register provides a mechanism to allow real-time trace tools to identify
the currently executing process in multi-tasking environments.
The contents of this register are replicated on the ETMPROCID pins of the
ARM926EJ-S processor. ETMPROCIDWR is pulsed when a write occurs to the
Context ID Register.
Table 2-27 shows the ARM instructions that you can use to access the Context ID
Register.
The format of the Context ID Register, Rd, transferred during this operation is shown
in Figure 2-16.
Figure 2-16 Context ID Register format
2.3.14 Register c14
Accessing (reading or writing) this register is reserved.
Table 2-27 Context ID register operations
Function Data ARM Instruction
Read context ID Context ID
MRC p15,0,<Rd>,c13,c0, 1
Write context ID Context ID MCR p15,0,<Rd>,c13,c0, 1
Context identifier
31 0