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ARM ARM926EJ-S - Privileged Instructions

ARM ARM926EJ-S
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Coprocessor Interface
ARM DDI0198D Copyright © 2001-2003 ARM Limited. All rights reserved. 8-9
8.5 Privileged instructions
The coprocessor might restrict certain instructions for use in privileged modes only. To
do this, the coprocessor has to track the nCPTRANS output.
Figure 8-7 shows how nCPTRANS changes after a mode change.
Figure 8-7 Privileged instructions
Decode Execute
Memory
CLK
CPINSTR[31:0]
nCPMREQ
nCPTRANS
CPLATECANCEL
CHSDE[1:0]
CHSEX[1:0]
Coprocessor pipeline
Instruction
aborted
Fetch
CPRT
Ignored LAST
Ignored
Decode
Ignored
Decode
Old mode New mode
CPPASS

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