Caches and Write Buffer
4-10 Copyright © 2001-2003 ARM Limited. All rights reserved. ARM DDI0198D
Figure 4-2 ARM926EJ-S cache associativity
Table 4-7 shows values of S and NSETS for an ARM926EJ-S cache.
Figure 4-2 shows the ARM926EJ-S cache associativity. In Figure 4-2, the following
points apply:
• the group of tags of the same Index define a Set
• the number of tags in a Set is the Associativity
3
1
TAG
0
0
2
1
3
4
5
6
7
n
2
31 S+5S+4 54 210
Tag Index Word Byte
Table 4-7 Values of S and NSETS
ARM926EJ-S
cache size
S NSETS
4KB 5 32
8KB 6 64
16KB 7 128
32KB 8 256
64KB 9 512
128KB 10 1024
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