Memory Management Unit
3-22 Copyright © 2001-2003 ARM Limited. All rights reserved. ARM DDI0198D
Fault status register (FSR)
Table 3-9 shows the various access permissions and controls supported by the data
MMU, and how these are interpreted to generate faults.
Note
Alignment faults can write either b0001 or b0011 into FSR[3:0].
Invalid values can occur in the status bit encoding for domain faults. This happens when
the fault is raised before a valid domain field has been read from a page table
description.
Aborts masked by a higher priority abort can be regenerated by fixing the cause of the
higher priority abort, and repeating the access.
Alignment faults are not possible for instruction fetches.
The instruction FSR can also be updated for instruction prefetch operations
(
MCR p15,0,<Rd>,c7,c13,1
).
Table 3-9 Priority encoding of fault status
Priority Source Size Status Domain
Highest Alignment - b00x1 Invalid
External abort on translation First level
Second level
b1100
b1110
Invalid
Valid
Translation Section
Page
b0101
b0111
Invalid
Valid
Domain Section
Page
b1001
b1011
Valid
Valid
Permission Section
Page
b1101
b1111
Valid
Valid
Lowest External abort Section or page b10x0 Invalid
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