Programmer’s Model
ARM DDI0198D Copyright © 2001-2003 ARM Limited. All rights reserved. 2-21
Reading from CP15 c7 is Unpredictable, with the exception of the two test and clean
operations (see Table 2-18 on page 2-22 and Test and clean operations on page 2-24).
You can use the following instruction to write to c7:
MCR p15, <Opcode_1>, <Rd>, <CRn>, <CRm>, <Opcode_2>
The cache functions, and a description of each function, provided by this register are
listed in Table 2-17.
Table 2-17 Function descriptions register c7
Function Description
Invalidate cache Invalidates all cache data, including any dirty data.
Invalidate single entry using
either index or modified virtual
address
Invalidates a single cache line, discarding any dirty data.
Clean single data entry using
either index or modified virtual
address
Writes the specified DCache line to main memory if the
line is marked valid and dirty. The line is marked as not
dirty. The valid bit is unchanged.
Clean and invalidate single
data entry using either index or
modified virtual address
Writes the specified DCache line to main memory if the
line is marked valid and dirty. The line is marked not valid.
Test and clean DCache Tests a number of cache lines, and cleans one of them if any
are dirty. Returns the overall dirty state of the cache in bit
30. See Test and clean operations on page 2-24.
Test, clean, and invalidate
DCache
As for test and clean, except that when the entire cache has
been tested and cleaned, it is invalidated. See Test and clean
operations on page 2-24.
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