Programmer’s Model
2-2 Copyright © 2001-2003 ARM Limited. All rights reserved. ARM DDI0198D
2.1 About the programmer’s model
The system control coprocessor (CP15) is used to configure and control the
ARM926EJ-S processor. The caches, Tightly-Coupled Memories (TCMs), Memory
Management Unit (MMU), and most other system options are controlled using CP15
registers. You can only access CP15 registers with MRC and MCR instructions in a
privileged mode. CDP, LDC, STC, MCRR, and MRRC instructions, and unprivileged
MRC or MCR instructions to CP15 cause the Undefined instruction exception to be
taken.
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