Epson S1D13706 - Table 8-13: 32-Bit Address Increments for Color Depth

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Epson Research and Development
Vancouver Design Center
S1D13706 Hardware Functional Specification
X31B-A-001-08 Issue Date: 01/11/13
bits 9-0 PIP
+
Window X End Position Bits [9:0]
These bits determine the X end position of the PIP
+
window in relation to the origin of the
panel. Due to the S1D13706 SwivelView feature, the X end position may not be a
horizontal position value (only true in 0° and 180° SwivelView). For further information
on defining the value of the X End Position register, see Section 13, “Picture-in-Picture
Plus (PIP+)” on page 143.
The register is also incremented differently based on the SwivelView orientation. For 0°
and 180° SwivelView the X end position is incremented by x pixels where x is relative to
the current color depth.
For 90° and 270° SwivelView the X end position is incremented in 1 line increments.
Depending on the color depth, some of the higher bits in this register are unused because
the maximum horizontal display width is 1024 pixels.
Note
1
These bits have no effect unless the PIP
+
Window Enable bit is set to 1
(REG[71h] bit 4).
2
The effect of REG[84h] through REG[91h] takes place only after REG[91h] is written
and at the next vertical non-display period.
PIP
+
Window X End Position Register 0
REG[8Ch] Read/Write
PIP
+
Window X End Position Bits 7-0
76543210
PIP
+
Window X End Position Register 1
REG[8Dh] Read/Write
n/a
PIP
+
Window X End Position
Bits 9-8
7 6 5 4 3 210
Table 8-13: 32-bit Address Increments for Color Depth
Color Depth Pixel Increment (x)
1 bpp 32
2 bpp 16
4 bpp 8
8 bpp 4
16 bpp 2