Epson Research and Development
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Vancouver Design Center
Hardware Functional Specification S1D13706
Issue Date: 01/11/13 X31B-A-001-08
6.1.2 Internal Clocks
Note
For further information on internal clocks, refer to Section 7, “Clocks” on page 90.
Table 6-4: Internal Clock Requirements
Symbol Parameter
2.0V 3.3V
Units
Min Max Min Max
f
BCLK
Bus Clock frequency 20 66 MHz
f
MCLK
Memory Clock frequency 20 50 MHz
f
PCLK
Pixel Clock frequency 20 50 MHz
f
PWMCLK
PWM Clock frequency 20 66 MHz