Epson S1D13706 - Figure 3-5: Typical System Diagram (MC68 K # 1, Motorola 16-Bit 68000); Figure 3-6: Typical System Diagram (MC68 K #2, Motorola 32-Bit 68030)

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Epson Research and Development
Vancouver Design Center
S1D13706 Hardware Functional Specification
X31B-A-001-08 Issue Date: 01/11/13
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Figure 3-5: Typical System Diagram (MC68K # 1, Motorola 16-Bit 68000)
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Figure 3-6: Typical System Diagram (MC68K #2, Motorola 32-Bit 68030)
S1D13706
FPLINE
FPFRAME
FPSHIFT
FPDAT[17:0]
LP
SPS
CLK
D[17:0]
18-bit
MC68K #1
BUS
RESET#
LDS#
D[15:0]
AS#
R/W#
DTACK#
A[16:1]
CLK
AB0
RD/WR#
AB[16:1]
DB[15:0]
WE1#
BS#
M/R#
CS#
CLKI
WAIT#
RESET#
A[23:17]
FC0, FC1
Decoder
Decoder
UDS#
GPO
CLKI2
Oscillator
HR-TFT
Display
Bias Power
RD#
WE0#
HIOVDD
GPIO0
GPIO1
GPIO2
GPIO3
PS
CLS
REV
SPL
S1D13706
FPSHIFT
FPFRAME
DRDY
GPIO0
FPDAT[17:0]
XSCL
DY
GCP
XINH
D[17:0]
18-bit
MC68K #2
BUS
RESET#
SIZ0
D[31:16]
AS#
R/W#
SIZ1
DSACK1#
A[16:0]
CLK
WE0#
RD/WR#
AB[16:0]
DB[15:0]
WE1#
BS#
RD#
M/R#
CS#
CLKI
WAIT#
RESET#
A[31:17]
FC0, FC1
Decoder
Decoder
DS#
GPO
CLKI2
Oscillator
D-TFD
XSET (Bias Power)
Display
FPLINE
LP
GPIO1
YSCL
GPIO2
FR
GPIO3
FRS
GPIO4
RES
GPIO5
DD_P1
GPIO6
YSCLD