Epson S1D13706 - Figure 3-3: Typical System Diagram (Hitachi SH-4 Bus); Figure 3-4: Typical System Diagram (Hitachi SH-3 Bus)

Epson Research and Development
Page 15
Vancouver Design Center
Hardware Functional Specification S1D13706
Issue Date: 01/11/13 X31B-A-001-08
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Figure 3-3: Typical System Diagram (Hitachi SH-4 Bus)
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Figure 3-4: Typical System Diagram (Hitachi SH-3 Bus)
S1D13706
FPLINE
FPFRAME
FPSHIFT
DRDY
FPDAT[9:0]
FPLINE
FPFRAME
FPSHIFT
DRDY
D[9:0]
12-bit
SH-4
BUS
RESET#
WE0#
D[15:0]
BS#
RD/WR#
RD#
RDY#
A[16:1]
CKIO
WE0#
RD/WR#
AB[16:1]
DB[15:0]
WE1#
BS#
RD#
M/R#
CS#
CLKI
WAIT#
RESET#
A[25:17]
CSn#
WE1#
GPO
CLKI2
Oscillator
TFT
Display
Bias Power
FPDAT12
FPDAT15
D10
D11
Decoder
VSS
AB0
S1D13706
FPLINE
FPFRAME
FPSHIFT
DRDY
FPDAT[17:0]
FPLINE
FPFRAME
FPSHIFT
DRDY
D[17:0]
18-bit
SH-3
BUS
RESET#
WE0#
D[15:0]
BS#
RD/WR#
RD#
WAIT#
A[16:1]
CKIO
WE0#
RD/WR#
AB[16:1]
DB[15:0]
WE1#
BS#
RD#
M/R#
CS#
CLKI
WAIT#
RESET#
A[25:17]
CSn#
WE1#
GPO
CLKI2
Oscillator
TFT
Display
Bias Power
Decoder
VSS
AB0