Epson S1D13706 - Table 4-1: CFLGA Pin Mapping; Pinout Diagram - CFLGA - 104 Pin; Figure 4-2: Pinout Diagram - CFLGA - 104 Pin (S1 D13706 B00 A)

Epson Research and Development
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Hardware Functional Specification S1D13706
Issue Date: 01/11/13 X31B-A-001-08
4.2 Pinout Diagram - CFLGA - 104pin
Figure 4-2: Pinout Diagram - CFLGA - 104pin (S1D13706B00A)
Table 4-1: CFLGA Pin Mapping
L
NC
NIOVDD GPIO0 GPIO4 COREVDD DB0 DB4 DB6
NC
K
GPO GPIO2 GPIO6 GPIO5 DB2 DB8 DB9
J
NIOVDD FPFRAME FPLINE CVOUT GPIO3 PWMOUT DB1 DB5 DB7 DB11 HIOVDD
H
FPDAT1 FPDAT0 FPSHIFT FPDAT2 DRDY GPIO1 DB3 DB10 DB13 DB14 DB12
G
FPDAT5 FPDAT4 FPDAT3 FPDAT6 VSS NC VSS WE1# CLKI DB15 WAIT#
F
FPDAT10 FPDAT7 FPDAT8 VSS VSS NC NC VSS BS# RD/WR# RESET#
E
FPDAT11 FPDAT9 FPDAT13 FPDAT16 VSS NC VSS AB1 M/R# WE0# RD#
D
NIOVDD FPDAT12 FPDAT14 CNF7 CNF3 AB13 AB11 AB7 AB3 CS# AB0
C
NC FPDAT15 FPDAT17 CNF5 CNF1 TESTEN AB14 AB9 AB5 AB2 HIOVDD
B
NC
CLKI2 CNF6 CNF0 AB15 AB16 AB8 AB4
NC
A
NIOVDD CNF4 CNF2 COREVDD AB12 AB10 AB6
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L
K
J
H
G
F
E
D
C
B
A
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