Epson S1D13706 - LCD Pin Mapping for y Connector (LF26 SCT)

Epson Research and Development
Page 17
Vancouver Design Center
Connecting to the Epson D-TFD Panels S1D13706
Issue Date: 01/02/23 X31B-G-012-03
3.3 LCD Pin Mapping for Y Connector (LF26SCT)
Table 3-3: LCD Pin Mapping for Y Connector: Pins for Y - Driver (LF26SCT)
LCD Pin
No.
LCD Pin
Name
S1D13706
Pin Name
Description Remarks
Y-1 DYIO1 No Connect Start pulse signal
Forward scanning: Open
Reverse scanning: Active low pulse using
VCCY and V5Y for logic level.
Y-2 DYIO2 FPFRAME Start pulse signal
Forward scanning: Active low pulse using
VCCY and V5Y for logic level.
Reverse scanning: Open
See Section 2.5, “Level Shift and Clamp
Circuit for Vertical Logic Control Signals”
on page 13.
Y-3 VDD - Power supply for liquid crystal drive
See Section 2.4, “Swing Power Supply for
the Vertical Drive (V0Y) and Logic (VCCY
/ V5Y) Voltages” on page 12.
Y-4 V0Y - Power supply for liquid crystal drive
See Section 2.4, “Swing Power Supply for
the Vertical Drive (V0Y) and Logic (VCCY
/ V5Y) Voltages” on page 12.
Y-5 NC No Connect No Connect
Y-6 V5Y -
Power supply for logic low and liquid crystal
drive
See Section 2.4, “Swing Power Supply for
the Vertical Drive (V0Y) and Logic (VCCY
/ V5Y) Voltages” on page 12.
Y-7 VCCY - Power supply for logic high
See Section 2.4, “Swing Power Supply for
the Vertical Drive (V0Y) and Logic (VCCY
/ V5Y) Voltages” on page 12.
Y-8 FRY GPIO2 AC signal for output
See Section 2.5, “Level Shift and Clamp
Circuit for Vertical Logic Control Signals”
on page 13.
Y-9 YSCL GPIO1 Shift clock signal
See Section 2.5, “Level Shift and Clamp
Circuit for Vertical Logic Control Signals”
on page 13.
Y-10 XINH GPIO0 Thinning control signal
See Section 2.5, “Level Shift and Clamp
Circuit for Vertical Logic Control Signals”
on page 13.
Y-11 SHF - Shift direction selection for shift registers
Forward scanning: V5Y
Reverse scanning: VCCY
Connect to V5Y.
Y-12 GND VSS (GND)
Ground and power supply for liquid crystal
drive