Epson S1D13706 - Bpp Color Depth; Figure 14-2: Byte-Swapping for 1;2;4;8 Bpp

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S1D13706 Hardware Functional Specification
X31B-A-001-08 Issue Date: 01/11/13
14.1.2 1/2/4/8 Bpp Color Depth
For 1/2/4/8 bpp color depth, byte swapping must be performed on the bus data but not the
display data.
For 1/2/4/8 bpp color depth, the Display Data Byte Swap bit (REG[71h] bit 6) must be
set to 0.
Figure 14-2: Byte-swapping for 1/2/4/8 Bpp
11 22
22
22 11
11
015
0
15
D[15:8]
D[7:0]
* High byte lane (D[15:8]) data (e.g. 11) is associated with even address.
* Low byte lane (D[7:0]) data (e.g. 22) is associated with odd address.
CPU Data
Byte Swap
System
Memory
Display
Buffer
(Big-Endian)
(Little-Endian)
0
0
System
Memory
Address
Display
Buffer
Address