Epson S1D13706 - Page 259

S1D13706 Register Summary X31B-R-001-02
Page 1 01/02/26
REG[00h] R
EVISION
C
ODE
R
EGISTER
1
RO
Product Code = 001010 Revision Code = 00
Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bit 1 Bit 0
REG[01h] D
ISPLAY
B
UFFER
S
IZE
R
EGISTER
RW
Display Buffer Size
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
REG[02h] C
ONFIGURATION
R
EADBACK
R
EGISTER
RO
CNF7 Status CNF6 Status CNF5 Status CNF4 Status CNF3 Status CNF2 Status CNF1 Status CNF0 Status
REG[04h] M
EMORY
C
LOCK
C
ONFIGURATION
R
EGISTER
2
RW
n/a n/a
MCLK Divide Select
n/a n/a n/a
Reserved
bit 1 bit 0
REG[05h] P
IXEL
C
LOCK
C
ONFIGURATION
R
EGISTER
3,4
RW
n/a
PCLK Divide Select
n/a n/a
PCLK Source Select
Bit 2 Bit 1 Bit 0 Bit 1 Bit 0
REG[08h] L
OOK
-U
P
T
ABLE
B
LUE
W
RITE
D
ATA
R
EGISTER
WO
LUT Blue Write Data
n/a n/a
Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
REG[09h] L
OOK
-U
P
T
ABLE
G
REEN
W
RITE
D
ATA
R
EGISTER
WO
LUT Green Write Data
n/a n/a
Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
REG[0Ah] L
OOK
-U
P
T
ABLE
R
ED
W
RITE
D
ATA
R
EGISTER
WO
LUT Red Write Data
n/a n/a
Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
REG[0Bh] L
OOK
-U
P
T
ABLE
W
RITE
A
DDRESS
R
EGISTER
WO
LUT Write Address
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
REG[0Ch] L
OOK
-U
P
T
ABLE
B
LUE
R
EAD
D
ATA
R
EGISTER
RO
LUT Blue Read Data
n/a n/a
Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
REG[0Dh] L
OOK
-U
P
T
ABLE
G
REEN
R
EAD
D
ATA
R
EGISTER
RO
LUT Green Read Data
n/a n/a
Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
REG[0Eh] L
OOK
-U
P
T
ABLE
R
ED
R
EAD
D
ATA
R
EGISTER
RO
LUT Red Write Data
n/a n/a
Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
REG[0Fh] L
OOK
-U
P
T
ABLE
R
EAD
A
DDRESS
R
EGISTER
WO
LUT Read Address
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
REG[10h] P
ANEL
T
YPE
R
EGISTER
5,6
RW
Panel Data
Format
Select
Color/Mono
Panel Select
Panel Data Width
Active Panel
Res. Select
n/a
Panel Type
Bit 1 Bit 0 Bit 1 Bit 0
REG[11h] MOD R
ATE
R
EGISTER
RW
n/a n/a
MOD Rate
bit 5 bit 4 bit 3 bit 2 bit1 bit 0
REG[12h] H
ORIZONTAL
T
OTAL
R
EGISTER
RW
n/a
Horizontal Total
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
REG[14h] H
ORIZONTAL
D
ISPLAY
P
ERIOD
R
EGISTER
RW
n/a
Horizontal Display Period
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
REG[16h] H
ORIZONTAL
D
ISPLAY
P
ERIOD
S
TART
P
OSITION
R
EGISTER
0 RW
Horizontal Display Period Start Position
bit 7bit 6bit 5bit 4bit 3bit 2bit 1bit 0
REG[17h] H
ORIZONTAL
D
ISPLAY
P
ERIOD
S
TART
P
OSITION
R
EGISTER
1 RW
n/a n/a n/a n/a n/a n/a
Horizontal Display Period
Start Position
bit 9 bit 8
REG[18h] V
ERTICAL
T
OTAL
R
EGISTER
0 RW
Vertical Total
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
REG[19h] V
ERTICAL
T
OTAL
R
EGISTER
1 RW
n/a n/a n/a n/a n/a n/a
Vertical Total
Bit 9 Bit 8
REG[1Ch] V
ERTICAL
D
ISPLAY
P
ERIOD
R
EGISTER
0 RW
Vertical Display Period
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
REG[1Dh] V
ERTICAL
D
ISPLAY
P
ERIOD
R
EGISTER
1 RW
n/a n/a n/a n/a n/a n/a
Vertical Display Period
Bit 9 Bit 8
REG[1Eh] V
ERTICAL
D
ISPLAY
P
ERIOD
S
TART
P
OSITION
R
EGISTER
0 RW
Vertical Display Period Start Position
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
REG[1Fh] V
ERTICAL
D
ISPLAY
P
ERIOD
S
TART
P
OSITION
R
EGISTER
1 RW
n/a n/a n/a n/a n/a n/a
Vertical Display Period
Start Position
bit 9 bit 8
REG[20h] FPLINE P
ULSE
W
IDTH
R
EGISTER
RW
FPLINE
Pulse
Polarity
FPLINE Pulse Width
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
REG[22h] FPLINE P
ULSE
S
TART
P
OSITION
R
EGISTER
0 RW
FPLINE Pulse Start Position
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
REG[23h] FPLINE P
ULSE
S
TART
P
OSITION
R
EGISTER
1 RW
n/a n/a n/a n/a n/a n/a
FPLINE Pulse Start
Position
Bit 9 Bit 8
REG[24h] FPFRAME P
ULSE
W
IDTH
R
EGISTER
RW
FPFRAME
Pulse
Polarity
n/a n/a n/a n/a
FPFRAME Pulse Width
Bit 2 Bit 1 Bit 0
REG[26h] FPFRAME P
ULSE
S
TART
P
OSITION
R
EGISTER
0 RW
FPFRAME Pulse Start Position
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
REG[27h] FPFRAME P
ULSE
S
TART
P
OSITION
R
EGISTER
1 RW
n/a n/a n/a n/a n/a n/a
FPFRAME Pulse Start
Position
Bit 9 Bit 8
REG[28h] D-TFD GCP I
NDEX
R
EGISTER
RW
n/a n/a n/a
D-TFD GCP Index
Bit 4Bit 3Bit 2Bit 1Bit 0
REG[2Ch] D-TFD GCP D
ATA
R
EGISTER
RW
D-TFD GCP Data
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
REG[70h] D
ISPLAY
M
ODE
R
EGISTER
7
RW
Display
Blank
Dithering
Disable
Hardware
Video Invert
Enable
Software
Video Invert
n/a
Bit-per-pixel Select
Bit 2 Bit 1 Bit 0
REG[71h] S
PECIAL
E
FFECTS
R
EGISTER
8
RW
Display Data
Word Swap
Display Data
Byte Swap
n/a
Sub-Window
Enable
n/a n/a
SwivelView™ Mode Select
Bit 1 Bit 0
REG[74h] M
AIN
W
INDOW
D
ISPLAY
S
TART
A
DDRESS
R
EGISTER
0 RW
Main Window Display Start Address
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
REG[75h] M
AIN
W
INDOW
D
ISPLAY
S
TART
A
DDRESS
R
EGISTER
1 RW
Main Window Display Start Address
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
REG[76h] M
AIN
W
INDOW
D
ISPLAY
S
TART
A
DDRESS
R
EGISTER
2 RW
n/a n/a n/a n/a n/a n/a n/a
Main
Window
Display Start
Address Bit
16
REG[78h] M
AIN
W
INDOW
L
INE
A
DDRESS
O
FFSET
R
EGISTER
0 RW
Main Window Line Address Offset
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
REG[79h] M
AIN
W
INDOW
L
INE
A
DDRESS
O
FFSET
R
EGISTER
1 RW
n/a n/a n/a n/a n/a n/a
Main Window Line
Address Offset
Bit 9 Bit 8
REG[7Ch] S
UB
-W
INDOW
D
ISPLAY
S
TART
A
DDRESS
R
EGISTER
0 RW
Sub-Window Display Start Address
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
REG[7Dh] S
UB
-W
INDOW
D
ISPLAY
S
TART
A
DDRESS
R
EGISTER
1 RW
Sub-Window Display Start Address
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
REG[7Eh] S
UB
-W
INDOW
D
ISPLAY
S
TART
A
DDRESS
R
EGISTER
2 RW
n/a n/a n/a n/a n/a n/a n/a
Sub-Window
Display Start
Address Bit
16
REG[80h] S
UB
-W
INDOW
L
INE
A
DDRESS
O
FFSET
R
EGISTER
0 RW
Sub-Window Line Address Offset
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
REG[81h] S
UB
-W
INDOW
L
INE
A
DDRESS
O
FFSET
R
EGISTER
1 RW
n/a n/a n/a n/a n/a n/a
Sub-Window Line Address
Offset
Bit 9 Bit 8
REG[84h] S
UB
-W
INDOW
X S
TART
P
OSITION
R
EGISTER
0 RW
Sub-Window X Start Position
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
REG[85h] S
UB
-W
INDOW
X S
TART
P
OSITION
R
EGISTER
1 RW
n/a n/a n/a n/a n/a n/a
Sub-Window X Start
Position
Bit 9 Bit 8
REG[88h] S
UB
-W
INDOW
Y S
TART
P
OSITION
R
EGISTER
0 RW
Sub-Window Y Start Position
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
S1D13706 Register Summary X31B-R-001-02