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Epson S1D13706 - Page 33

Epson S1D13706
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Epson Research and Development
Page 27
Vancouver Design Center
Hardware Functional Specification S1D13706
Issue Date: 01/11/13 X31B-A-001-08
GPIO2 IO 43 LB3M NIOVDD 0
This pin has multiple functions.
REV for Sharp HR-TFT
FR for Epson D-TFD
General purpose IO pin 2 (GPIO2)
See Table 4-10: “LCD Interface Pin Mapping,” on page 31
for
summary.
GPIO3 IO 42 LB3M NIOVDD 0
This pin has multiple functions.
SPL for Sharp HR-TFT
FRS for Epson D-TFD
General purpose IO pin 3 (GPIO3)
See Table 4-10: “LCD Interface Pin Mapping,” on page 31
for
summary.
GPIO4 IO 41 LB3M NIOVDD 0
This pin has multiple functions.
RES for Epson D-TFD
General purpose IO pin 4 (GPIO4)
See Table 4-10: “LCD Interface Pin Mapping,” on page 31
for
summary.
GPIO5 IO 40 LB3M NIOVDD 0
This pin has multiple functions.
DD_P1 for Epson D-TFD
General purpose IO pin 5 (GPIO5)
See Table 4-10: “LCD Interface Pin Mapping,” on page 31
for
summary.
GPIO6 IO 39 LB3M NIOVDD 0
This pin has multiple functions.
YSCLD for Epson D-TFD
General purpose IO pin 6 (GPIO6)
See Table 4-10: “LCD Interface Pin Mapping,” on page 31
for
summary.
PWMOUT O 38 LB3P NIOVDD 0
This output pin has multiple functions.
PWM Clock output
General purpose output
CVOUT O 46 LB3P NIOVDD 0
This output pin has multiple functions.
CV Pulse Output
General purpose output
Table 4-4: LCD Interface Pin Descriptions
Pin Name Type Pin # Cell
IO
Voltage
RESET#
State
Description

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