Epson Research and Development
Page 3
Vancouver Design Center
Power Consumption S1D13706
Issue Date: 01/02/23 X31B-G-006-02
1 S1D13706 Power Consumption
S1D13706 power consumption is affected by many system design variables.
• Input clock frequency (CLKI/CLKI2): the CLKI/CLKI2 frequency determines the LCD
frame-rate, CPU performance to memory, and other functions – the higher the input
clock frequency, the higher the frame-rate, performance and power consumption.
• CPU interface: the S1D13706 current consumption depends on the BCLK frequency,
data width, number of toggling pins, and other factors – the higher the BCLK, the higher
the CPU performance and power consumption.
•V
DD
voltage level: the voltage level affects power consumption – the higher the voltage,
the higher the consumption.
• Display mode: the resolution and color depth affect power consumption – the higher the
resolution/color depth, the higher the consumption.
• Internal CLK divide: internal registers allow the input clock to be divided before going
to the internal logic blocks – the higher the divide, the lower the power consumption.
There is a power save mode in the S1D13706. The power consumption is affected by
various system design variables.
• Clock states during the power save mode: disabling the clocks during power save mode
has substantial power savings.
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