P74x/EN FD/N
1, P742, P743
(FD) 9-
3.5.4 Programmable scheme logic
The purpose of the programmable scheme logic (PSL) is to allow the relay user to configure
an individual protection scheme to suit their own particular application. This is achieved
through the use of programmable logic gates and delay timers.
The input to the PSL is any combination of the status of the digital input signals from the
opto-isolators on the input board, the outputs of the protection elements, e.g. protection
starts and trips, control inputs, function keys and the outputs of the fixed protection scheme
logic. The fixed scheme logic provides the relay’s standard protection schemes. The PSL
itself consists of software logic gates and timers. The logic gates can be programmed to
perform a range of different logic functions and can accept any number of inputs. The timers
are used either to create a programmable delay, and/or to condition the logic outputs, e.g. to
create a pulse of fixed duration on the output regardless of the length of the pulse on the
input. The outputs of the PSL are the LEDs on the front panel of the relay and the output
contacts at the rear.
The execution of the PSL logic is event driven; the logic is processed whenever any of its
inputs change, for example as a result of a change in one of the digital input signals or a trip
output from a protection element. Also, only the part of the PSL logic that is affected by the
particular input change that has occurred is processed. This reduces the amount of
processing time that is used by the PSL. The protection and control software updates the
logic delay timers and checks for a change in the PSL input signals every time it runs.
This system provides flexibility for the user to create their own scheme logic design.
However, it also means that the PSL can be configured into a very complex system, and
because of this setting of the PSL is implemented through the PC support package S1.
3.5.5 Function key interface (P741 and P743)
The ten function keys interface directly into the PSL as digital input signals and are
processed based on the PSL’s event driven execution. However, a change of state is only
recognized when a key press is executed on average for longer than 200 ms. The time to
register a change of state depends on whether the function key press is executed at the start
or the end of a protection task cycle, with the additional hardware and software scan time
included. A function key press can provide a latched (toggled mode) or output on key press
only (normal mode) depending on how it is programmed and can be configured to individual
protection scheme requirements. The latched state signal for each function key is written to
non-volatile memory and read from non-volatile memory during relay power up thus allowing
the function Key state to be reinstated after power-up should relay power be inadvertently
lost.
3.5.6 Event and fault recording
A change in any digital input signal or protection element output signal causes an event
record to be created. When this happens, the protection and control task sends a message
to the supervisor task to indicate that an event is available to be processed and writes the
event data to a fast buffer in SRAM which is controlled by the supervisor task. When the
supervisor task receives either an event or fault record message, it instructs the platform
software to create the appropriate log in battery backed-up SRAM. The operation of the
record logging to battery backed-up SRAM is slower than the supervisor’s buffer. This
means that the protection software is not delayed waiting for the records to be logged by the
platform software. However, in the rare case when a large number of records to be logged
are created in a short period of time, it is possible that some will be lost if the supervisor’s
buffer is full before the platform software is able to create a new log in battery backed-up
SRAM. If this occurs then an event is logged to indicate this loss of information.
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