CPU 36
Table 3-4 Class: HP_ProcessorCore
Property name Property implementation
• 2 (Enabled)
EnabledState
• 3 (Disabled)
RequestedState 12 (Not Applicable)
EnabledDefault 2 (Enabled)
CIM_ProcessorCore
• HPQ:HP_ProcessorCore:Cabinet x, Cell y, Socket
z Core m (for cellular systems)
InstanceID
• HPQ:HP_ProcessorCore: Socket z Core m (for
non-cellular systems)
• 0 (Unknown)
CoreEnabledState
• 1 (DMTF Reserved)
• 2 (Core Enabled)
• 3 (Core Disabled)
• 4 (Core Disabled by User)
• 5 (Core Disabled by POST Error)
• For x86 processors:
Characteristics
Characteristics[0]: 3 (32-bit Capable)
• For x64 processors:
â—‹ Characteristics[0]: 3 (32-bit Capable)
â—‹ Characteristics[1]: 2 (64-bit Capable)
• For ia64 processors:
â—‹ Characteristics[0]: 2 (64-bit Capable)
HP_ProcessorCore
Bootstrap Not supported
3.3.4HP_HardwareThread
HP_HardwareThread extends the class CIM_HardwareThread to model the hardware threads.
The following properties are implemented.
Table 3-5 Class: HP_HardwareThread
Property name Property implementation
CIM_ManagedElement
Caption
• Cabinet x, Cell y, Socket z Core m
Thread n (for cellular systems)
• Socket z Core m Thread n (for non-cellular
systems)