Chapter 5 Web-Based Operations
94 Lynx II DSA User's Manual - 7096089
Gate Mode
Specifies the coincidence gate mode of operation. Selections are None, Coincidence, Anti-
Coincidence, Combined Adv Coincidence, and Combined Adv Anti-Coincidence.
Off
Coincidence logic is disabled. Storage is not affected by external gating signals.
Coincidence
Events are stored in the acquiring group when storage occurs within the gating window.
The gating window begins at the rising edge of the slow discriminator signal and ends at
the rising edge of the store pulse. An external gate pulse must appear within the gating
window. The timing of the external pulse is controlled by user-supplied logic.
The storage of a qualifying event can be further delayed by setting the Gate Delay
parameter when the value is greater than the filter shaping.
AntiCoincidence
Events are stored when storage occurs outside the gating window. The gating window is
the same as in the Coincidence mode.
The storage of a qualifying event can be further delayed by the setting of the Gate Delay
parameter when the value is greater than the filter shaping.
Note: Please note that the Combined coincidence settings apply only to PHA
acquisition modes.
Combined-Adv Coincidence
In Combined Adv Anti-Coincidence mode, the user can align the input gate with the
store pulse of the event with the Input Gate Delay (µs) and Input Pulse Width (µs). Only
events whose store pulse overlaps the gate (delayed and widened by the Input Gate
Delay and Input Pulse Width fields) of the selected polarity will be recorded in Memory
Group 1. All events (regardless of gating condition) will be recorded in Memory Group
2.
Note: The Lynx II web application displays events from Memory group 1. If Compare
Spectra is checked in Preferences | Miscellaneous, data stored in Memory
group 2 are overlaid with group 1. To view separately or in more detail, please
use other applications like Genie-2000 which supports displaying multiple
Memory groups.
Combined-Adv Anti-Coincidence
In Combined Adv Anti-Coincidence mode, the user can align the input gate with the
store pulse of the event with the Input Gate Delay (µs) and Input Pulse Width (µs). Only
events whose store pulse does not overlap the gate (delayed and widened by the Input
Gate Delay and Input Pulse Width fields) of the selected polarity will be recorded in
Memory Group 1. Gated pulses will be rejected and not stored in Memory Group 1. All
events (regardless of gating condition) will be recorded in Memory Group 2.
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