R&S FSPN - Page 269

Network and Remote Operation
R&S
®
FSPN
269User Manual 1179.4363.02 ─ 01
Bit No. Meaning
5 Command Error
This bit is set if a command is received, which is undefined or syntactically incorrect. An error
message with a number between -100 and -200, which denotes the error in greater detail, is
entered into the error queue.
6 User Request
This bit is set when the instrument is switched over to manual control.
7 Power On (supply voltage on)
This bit is set on switching on the instrument.
STATus:OPERation Register
The STATus:OPERation register contains information on current activities of the
R&S FSPN. It also contains information on activities that have been executed since the
last read out.
STATus:QUEStionable Register
The STATus:QUEStionable register contains information on instrument states that do
not meet the specifications.
You can read out the register with STAT:QUES:COND or STAT:QUES:EVEN.
The STATus:QUEStionable register "sums up" the information from all subregisters
(e.g. bit 2 sums up the information for all STATus:QUEStionable:TIMe registers).
For some subregisters, there may be separate registers for each active channel. Thus,
if a status bit in the STATus:QUEStionable register indicates an error, the error may
have occurred in any of the channel-specific subregisters. In this case, you must check
the subregister of each channel to determine which channel caused the error. By
default, querying the status of a subregister always returns the result for the currently
selected channel.
STATus:QUEStionable:ACPLimit Register
The STATus:QUEStionable:ACPLimit register contains information about the results of
a limit check during ACLR measurements. A separate ACPLimit register exists for
each active channel.
You can read out the register with STATus:QUEStionable:ACPLimit:CONDition?
or STATus:QUEStionable:ACPLimit[:EVENt]?
Table 10-8: Meaning of the bits used in the STATus:QUEStionable:ACPLimit register
Bit No. Meaning
0 ADJ UPPer FAIL
This bit is set if the limit is exceeded in the upper adjacent channel
1 ADJ LOWer FAIL
This bit is set if the limit is exceeded in the lower adjacent channel.
Remote Control Basics