Remote Control
R&S
®
FSPN
517User Manual 1179.4363.02 ─ 01
STATus:QUEStionable:ACPLimit[:EVENt]? <ChannelName>
STATus:QUEStionable:EXTended[:EVENt]? <ChannelName>
STATus:QUEStionable:EXTended:INFO[:EVENt]? <ChannelName>
STATus:QUEStionable:FREQuency[:EVENt]? <ChannelName>
STATus:QUEStionable:LIMit<n>[:EVENt]? <ChannelName>
STATus:QUEStionable:LMARgin<n>[:EVENt]? <ChannelName>
STATus:QUEStionable:PNOise[:EVENt]? <ChannelName>
STATus:QUEStionable:POWer[:EVENt]? <ChannelName>
STATus:QUEStionable:POWer:DCPNoise[:EVENt]? <ChannelName>
STATus:QUEStionable:TEMPerature[:EVENt]? <ChannelName>
STATus:QUEStionable:TIME[:EVENt]? <ChannelName>
These commands read out the EVENt section of the status register.
At the same time, the commands delete the contents of the EVENt section.
Suffix:
<n>
.
Window
Query parameters:
<ChannelName> String containing the name of the channel.
The parameter is optional. If you omit it, the command works for
the currently active channel.
Usage: Query only
11.10.4 Controlling the ENABle Part
For more information on the enable part see Chapter 10.1.7.2, "Structure of a SCPI
Status Register", on page 265.
STATus:OPERation:ENABle <SumBit>
STATus:QUEStionable:ENABle <SumBit>
STATus:QUEStionable:ACPLimit:ENABle <SumBit>,<ChannelName>
STATus:QUEStionable:EXTended:ENABle <SumBit>,<ChannelName>
STATus:QUEStionable:EXTended:INFO:ENABle <SumBit>,<ChannelName>
STATus:QUEStionable:FREQuency:ENABle <SumBit>,<ChannelName>
STATus:QUEStionable:LIMit<n>:ENABle <SumBit>,<ChannelName>
STATus:QUEStionable:LMARgin<n>:ENABle <SumBit>,<ChannelName>
STATus:QUEStionable:PNOise:ENABle <SumBit>,<ChannelName>
STATus:QUEStionable:POWer:ENABle <SumBit>,<ChannelName>
STATus:QUEStionable:POWer:DCPNoise:ENABle <SumBit>,<ChannelName>
STATus:QUEStionable:TEMPerature:ENABle <SumBit>,<ChannelName>
STATus:QUEStionable:TIME:ENABle <SumBit>,<ChannelName>
These commands control the ENABle part of a register.
The ENABle part allows true conditions in the EVENt part of the status register to bere-
ported in the summary bit. If a bit is 1 in the enable register and its associated event bit
transitions to true, a positive transition will occur in the summary bit reported to the
next higher level.
Using the Status Register
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