Section 9 Timers
Rev. 7.00 Mar 10, 2005 page 313 of 652
REJ09B0042-0700
Pin Configuration
Table 9.18 shows the asynchronous event counter pin configuration.
Table 9.18 Pin Configuration
Name Abbr. I/O Function
Asynchronous event input H AEVH Input Event input pin for input to event counter H
Asynchronous event input L AEVL Input Event input pin for input to event counter L
Event input enable interrupt input IRQAEC Input Input pin for interrupt enabling event input
Register Configuration
Table 9.19 shows the register configuration of the asynchronous event counter.
Table 9.19 Asynchronous Event Counter Registers
Name Abbr. R/W Initial Value Address
Event counter PWM compare register H ECPWCRH R/W H'FF H'FF8C
Event counter PWM compare register L ECPWCRL R/W H'FF H'FF8D
Event counter PWM data register H ECPWDRH W H'00 H'FF8E
Event counter PWM data register L ECPWDRL W H'00 H'FF8F
Input pin edge select register AEGSR R/W H'00 H'FF92
Event counter control register ECCR R/W H'00 H'FF94
Event counter control/status register ECCSR R/W H'00 H'FF95
Event counter H ECH R H'00 H'FF96
Event counter L ECL R H'00 H'FF97
Clock stop register 2 CKSTPR2 R/W H'FF H'FFFB
To Next Page
Loading...
Need help?
General
