Renesas H8 Series - Page 600

Appendix B Internal I/O Registers
Rev. 7.00 Mar 10, 2005 page 558 of 652
REJ09B0042-0700
EBR—Erase Block Register H'F023 Flash Memory
Bit
Initial value
Read/Write
Note: Set the bit of EBR to H'00 when erasing.
7

0

6

0

5

0

0
EB0
0
R/W
2
EB2
0
R/W
1
EB1
0
R/W
4
EB4
0
R/W
Blocks 4 to 0
0
When a block of EB4 to EB0 is not selected (initial value)
1 When a block of EB4 to EB0 is selected
3
EB3
0
R/W
FENR—Flash Memory Enable Register H'F02B Flash Memory
Bit
Initial value
Read/Write
7
FLSHE
0
R/W
6

0

5

0

0

0

2

0

1

0

4

0

Flash Memory Control Register Enable
0
The flash memory control register cannot be accessed
1 The flash memory control register can be accessed
3

0
