Renesas H8 Series - Page 610

Appendix B Internal I/O Registers
Rev. 7.00 Mar 10, 2005 page 568 of 652
REJ09B0042-0700
SMR—Serial Mode Register H'A8 SCI3
Bit
Initial value
Read/Write
7
COM
0
R/W
6
CHR
0
R/W
5
PE
0
R/W
0
CKS0
0
R/W
2
MP
0
R/W
1
CKS1
0
R/W
4
PM
0
R/W
Clock Select
0
0
01
1
1
1
φ clock
φ
w
/2 clock
0
φ/16 clock
φ/64 clock
Multiprocessor Mode
0
Multiprocessor communication
function disabled
1 Multiprocessor communication
function enabled
Stop Bit Length
0
1 stop bit
1 2 stop bits
Parity Mode
0
Even parity
1 Odd parity
Parity Enable
0
Parity bit addition and checking disabled
1 Parity bit addition and checking enabled
Character Length
0
8-bit data/5-bit data
1 7-bit data/5-bit data
Communication Mode
0
Asynchronous mode
1 Synchronous mode
3
STOP
0
R/W