Renesas H8 Series

Appendix B Internal I/O Registers
Rev. 7.00 Mar 10, 2005 page 587 of 652
REJ09B0042-0700
AMR—A/D Mode Register H'C6 A/D Converter
Bit
Initial value
Read/Write
7
CKS
0
R/W
6
TRGE
0
R/W
4

1

3
CH3
0
R/W
0
CH0
0
R/W
2
CH2
0
R/W
1
CH1
0
R/W
Channel Select
No channel selected
Bit 3
0
Bit 2
Analog Input Channel
*: Don't care
CH3 CH2
0
CH1
CH0
Bit 1 Bit 0
0AN
1
1
0
1
1
00
External Trigger Select
0 Disables start of A/D conversion by external trigger
1 Enables start of A/D conversion by rising or falling edge
of external trigger at pin ADTRG
5

1

4
AN
5
AN
6
AN
**1 1 Do not specify this
combination
7
**
100
1
10
1
AN
0
AN
1
AN
2
AN
3
Clock Select
62/φ
Bit 7
0
Conversion PeriodCKS
31/φ1
62 µs
φ = 1 MHz
31 µs
12.4 µs
φ = 5 MHz

*
1
6.2 µs
φ = 10 MHz
*
2

*
1
Conversion Time
Notes: 1. Except for the H8/38124 Group, operation cannot be
guaranteed if the conversion time is less than 12.4 µs.
Make sure to select a setting that gives a conversion time of
12.4 µs or more in such cases. For the H8/38124 Group select
a setting that gives a conversion time of 6.2 µs or more.
2. H8/38124 Group only.