Renesas H8 Series

Appendix B Internal I/O Registers
Rev. 7.00 Mar 10, 2005 page 588 of 652
REJ09B0042-0700
ADRRH—A/D Result Register H H'C4 A/D Converter
ADRRL—A/D Result Register L H'C5
Bit
Initial value
Read/Write
A
DRRH
7
ADR9
Undefined
R
6
ADR8
Undefined
R
5
ADR7
Undefined
R
3
ADR5
Undefined
R
0
ADR2
Undefined
R
2
ADR4
Undefined
R
1
ADR3
Undefined
R
4
ADR6
Undefined
R
A/D conversion result
Bit
Initial value
Read/Write
A
DRRL
7
ADR1
Undefined
R
6
ADR0
Undefined
R
5



3



0



2



1



4



A/D conversion result
ADSR—A/D Start Register H'C7 A/D Converter
Bit
Initial value
Read/Write
7
ADSF
0
R/W
6

1

5

1

4

1

3

1

0

1

2

1

1

1

A/D Start Flag
0
1
Read
Write
Read
Write
Indicates completion of A/D conversion
Stops A/D conversion
Indicates A/D conversion in progress
Starts A/D conversion