Renesas H8 Series - Page 650

Appendix B Internal I/O Registers
Rev. 7.00 Mar 10, 2005 page 608 of 652
REJ09B0042-0700
IENR2—Interrupt Enable Register 2 H'F4 System Control
Bit
Initial value
Read/Write
7
IENDT
0
R/W
6
IENAD
0
R/W
5


W
3
IENTFH
0
R/W
0
IENEC
0
R/W
2
IENTFL
0
R/W
1
IENTC
0
R/W
4
IENTG
0
R/W
Asynchronous Event Counter
Interrupt Enable
0 Disables asynchronous event
counter interrupt requests
1 Enables asynchronous event
counter interrupt requests
Timer FL Interrupt Enable
0 Disables timer FL interrupt requests
1 Enables timer FL interrupt requests
Timer FH Interrupt Enable
0 Disables timer FH interrupt requests
1 Enables timer FH interrupt requests
Timer C Interrupt Enable
0 Disables timer C interrupt requests
1 Enables timer C interrupt requests
Timer G Interrupt Enable
0 Disables timer G interrupt requests
1 Enables timer G interrupt requests
A/D Converter Interrupt Enable
0 Disables A/D converter interrupt requests
1 Enables A/D converter interrupt requests
Direct Transition Interrupt Enable
0 Disables direct transition interrupt requests
1 Enables direct transition interrupt requests