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Renesas H8 Series
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Appendix B Internal I/O Registers
Rev. 7.00 Mar 10, 2005 page 609 of 652
REJ09B0042-0700
OSCCR—Clock Pulse Generator Control Register H'F5 Clock Pulse Generator
Note: This register is implemented on the H8/38124 Group only.
Bit
Initial value
Read/Write
7
SUBSTP
0
R/W
6

0
R
5

0
R/W
0

0
R/W
2
IRQAECF

R
1
OSCF

R
4

0
R/W
OSC Flag
0
Operation using system clock oscillator (on-chip oscillator stopped)
1 Operation using on-chip oscillator (system clock oscillator stopped)
IRQAEC Flag
0
IRQAEC pin set to GND during resets
1 IRQAEC pin set to VCC during resets
Subclock Oscillator Stop Control
0
Subclock oscillator operating (initial value)
1 Subclock oscillator stopped
3

0
R/W

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