NCK start-up
10.2 System data
CNC Part 1 (NCK, PLC, drive)
108 Commissioning Manual, 11/2006, 6FC5397-2AP10-2BA0
10.2.8 Cycle times
On the SINUMERIK 840D sl the system clock cycle, the position controller cycle, and the
interpolation cycle of the NC are based on the DP cycle time configured in STEP 7 HW
config. See Chapter "SIMATIC create S7 project".
System basic cycle
The system clock cycle is set fixed to the ratio of 1:1 with regard to the DP cycle time. The
active value is displayed in the machine data MD10050 SYSCLOCK_CYCLE_TIME (system
cycle). It cannot be changed.
Position controller cycle
The position controller cycle (MD 10061 POSTCTRL_CYCLE_TIME) is set to the fixed ratio
1:1 with respect to the system clock cycle. It cannot be changed.
Position control cycle offset
The position control cycle offset T
M
is automatically determined in the default setting
(MD10062 POSCTRL_CYCLE_DELAY=0).
The effective position controller offset is displayed in the MD10063[1].
The following values can be read out via the MD10063 POSCTRL_CYCLE_DIGNOSIS:
• MD10063[0]= T
DX
• MD10063[1]= T
M
• MD10063[2]= T
M
+ T
Lag max
The following conditions must be met for explicit specification of the position controller cycle
offset (MD10062 POSCTRL_CYCLE_DELAY!=0):
• The cyclic communication with the DP slaves (drives) must be completed before the
position controller is started.
Condition: T
M
> T
DX
• The position controller must be completed before the DP cycle/system clock is
completed.
Condition: T
M
+ T
Position control max
< T
DP
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