DCO Setup and Calibration
Runtime Calibration
The MSP430F5xx series (along with the ‘F4xx and ‘F6xx) of processors can perform dynamic
calibration of the Digitally Controlled Oscillator (DCO) using the Frequency-Locked Loop (FLL)
hardware built into the Unified Clock System (UCS).
Dynamic Calibration of DCO in Software
Minimize frequency drift due to changes in voltage or temperature
DCO clock precision is achieved by periodic adjustment in loop
Modify settings (DCO, MOD) in loop based upon comparison of DCO to
another known/stable freq, such as 32kHz crystal (or 50/60Hz AC power)
Frequency Locked Loop (FLL) – ‘lock’ one frequency to another
Software FLL is the only option available on ‘F1xx devices
While software FLL could be used for any MSP430 device, the F4xx/5xx/6xx
clock modules contain Hardware FLL circuitry
32768 Hz
// Partial SW FLL Code
if ( COUNT < Compare ) // DCO too fast
increase DCO/MOD;
else decrease DCO/MOD; // DCO too slow
In earlier MSP430 processors, this needed to be handled in software. Using the FLL, the
Modulation (MOD) parameter (i.e. field of the DCO control register) is adjusted up or down based
upon the count of DCO cycles versus an accurate reference clock (most commonly, a 32KHz
watch crystal).
4 - 28 MSP430 Workshop - MSP430 Clocks & Initialization
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