120
The source and target address can be the same. In the above example, when X0 is ON, the
instruction will be executed in every scanning period.
<Two operands>
Two source data do binary addition and send the result to addend data address. Each data’s
highest bit is the sign bit, 0 stands for positive, 1 stands for negative. All calculations are
algebraic processed. (5+ (-8) =-3)
If the result of a calculation is “0”, the “0” flag acts. If the result exceeds 323767 (16 bits
operation) or 2147483647 (32 bits operation) or 9223372036854775807(64 bits operation),
the carry flag acts (refer to the Related flag). If the result exceeds –323768(16 bits
operation)or -2147483648 (32 bits operation) or -9223372036854775808(64 bits
operation),the borrow flag acts (refer to the Related flag).
When doing 32/64 bits operation, the lower 16-bit side of the word soft component is
specified, and the next numbered soft component will be used as the high position. To avoid
ID repetition, we recommend you assign device’s ID to be even number.
Note:The addresses of operands in QADD instructions must be even.
In the above example, when X0 is ON, the instruction will be executed in every scanning
period. The rising or falling pulse edge is recommended to activate the instruction.
ADD D10 D12 D10
X0
S1· S2· D·
The two instructions are the same.
Flag meaning
ON: the calculate result is zero
OFF: the calculate result is not zero
ON: the calculate result is over -32768(16 bits) or -2147483648(32
bits) or -9,223,372,036,854,775,808(64 bits), borrowing flag bit
action.
OFF: the calculate result is less than -32768(16 bits) or -
2147483648(32 bits) or -9,223,372,036,854,775,808 (64 bits)
ON: the calculate result is over 32768(16 bits) or 2147483648(32
bits) or 9,223,372,036,854,775,807(64 bits), carrying flag bit action.
OFF: the calculate result is less than 32768(16 bits) or
2147483648(32 bits) or 9,223,372,036,854,775,807(64 bits)
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